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PCB v2.9 — Visual Rework Guide

Complete visual guide for all 27 routing violations found on the production PCB v2.9 (tag v2.9, commit adc073b). Each fix includes an annotated PCB render showing the exact location, the problem, and the rework procedure.

Source: hardware/debug/all-shorts-rework.md

Tools needed: soldering iron (fine tip), flux, 30AWG kynar wire, precision knife, multimeter, loupe or microscope.


Summary

SeverityCountDescriptionFixes
CRITICAL3Power-to-power bridge (GND↔VBUS, GND↔+5V)FIX 1-3
HIGH5Signal bridges two power nets (+3V3↔GND)FIX 4-8
MEDIUM-HIGH19Signal touches one power netFIX 9-27

Rework priority: perform the fixes in numerical order. Test with a multimeter after each one.


FIX 1-3: Power Shorts (CRITICAL)

These shorts prevent the board from powering on. FRONT side (F.Cu, display).

FIX 1 — VBUS → GND via

FIX 1

Detail
LayerF.Cu (front)
TraceVBUS horizontal (y=61, w=0.5mm)
ViaGND @ (108.5, 60.5) ø0.9mm
Gap-0.20mm
EffectVBUS shorted to GND → board does not power on
ActionScrape the F.Cu around the GND via (~1mm radius)
VerifyMultimeter: VBUS↔GND = open (>1MΩ)

FIX 2 — VBUS → +5V via

FIX 2

Detail
LayerF.Cu (front)
TraceVBUS vertical (x=111, w=0.5mm)
Via+5V @ (111.5, 56.5) ø0.9mm
Gap-0.20mm
EffectVBUS shorted to +5V
ActionScrape the F.Cu around the +5V via (~1mm radius)
VerifyMultimeter: VBUS↔+5V = open (>1MΩ)

FIX 3 — LCD_RST bridges VBUS↔GND

FIX 3

Detail
LayerF.Cu (front)
TraceLCD_RST horizontal (y=33, w=0.2mm)
Via 1GND @ (81.5, 33) — gap: -0.47mm
Via 2VBUS @ (111, 33) — gap: -0.52mm
EffectDirect GND↔VBUS bridge through the LCD_RST copper
ActionCut the LCD_RST trace at x=95, y=33. Scrape ~1mm. LCD_RST still works through its B.Cu route.
VerifyMultimeter: VBUS↔GND = open (>1MΩ)

FIX 4-8: Signal Bridges +3V3↔GND (HIGH)

Vertical B.Cu traces that cross both a +3V3 via and a GND via, creating power-to-power bridges. BACK side (B.Cu, components). 4 cuts per fix.

FIX 4 — USB_D- bridges +3V3↔GND

FIX 4

Detail
LayerB.Cu (back)
TraceUSB_D- vertical (x=91.7, w=0.2mm)
Via 1+3V3 @ (92.05, 44.6) — gap: -0.20mm
Via 2GND @ (92.05, 52.0) — gap: -0.20mm
Effect+3V3↔GND bridge through the USB_D- copper
Action4 knife cuts: above and below each via. ⚠ Native USB will stop working.
VerifyMultimeter: +3V3↔GND = open (>1MΩ)

FIX 5 — BTN_UP bridges +3V3↔GND

FIX 5

Detail
LayerB.Cu (back)
TraceBTN_UP vertical (x=67.5, w=0.25mm)
Via 1+3V3 @ (67.05, 44.6) — gap: -0.18mm
Via 2GND @ (67.05, 52.0) — gap: -0.18mm
Action4 cuts + a 30AWG wire jumper from y=43 to y=54
Verify+3V3↔GND = open

FIX 6 — BTN_LEFT bridges +3V3↔GND

FIX 6

Detail
LayerB.Cu (back)
TraceBTN_LEFT vertical (x=62.5, w=0.25mm)
Via 1+3V3 @ (62.05, 44.6) — gap: -0.18mm
Via 2GND @ (62.05, 52.0) — gap: -0.18mm
Action4 cuts + 30AWG wire jumper
Verify+3V3↔GND = open

FIX 7 — BTN_A bridges +3V3↔GND

FIX 7

Detail
LayerB.Cu (back)
TraceBTN_A vertical (x=52.5, w=0.25mm)
Via 1+3V3 @ (52.05, 44.6) — gap: -0.18mm
Via 2GND @ (52.05, 52.0) — gap: -0.18mm
Action4 cuts + 30AWG wire jumper
Verify+3V3↔GND = open

FIX 8 — BTN_L bridges +3V3↔GND

FIX 8

Detail
LayerB.Cu (back)
TraceBTN_L vertical (x=72.5, w=0.25mm)
Via 1+3V3 @ (72.05, 44.6) — gap: -0.13mm
Via 2GND @ (72.05, 52.0) — gap: -0.13mm
Via 3GND @ (73.05, 65.5) — gap: -0.03mm
Action4 cuts on the 2 main vias + a 30AWG wire jumper
Verify+3V3↔GND = open

FIX 9-27: Single-Net Shorts (MEDIUM)

A signal trace touching ONE power via. This creates no power-to-power bridge, but it clamps the signal to that power net's level. Action: scrape the copper around the via (~1mm radius).

FIX 9 — BTN_Y → +3V3 (F.Cu)

FIX 9

TraceViaGapEffectFix
BTN_Y+3V3 @ (70.45, 44.0)-0.475mmBTN_Y stuck HIGHScrape the F.Cu around the via

FIX 10 — USB_D+ → GND (F.Cu)

FIX 10

TraceViaGapEffectFix
USB_D+GND @ (85.05, 66.0)-0.425mmUSB_D+ shorted to GNDScrape the F.Cu around the via

FIX 11 — LCD_DC → GND (F.Cu)

FIX 11

TraceViaGapEffectFix
LCD_DCGND @ (109.05, 37.0)-0.395mmDisplay does not workScrape the F.Cu around the via

FIX 12-13 — BTN_DOWN → +3V3 (F.Cu, 2 spots)

FIX 12 FIX 13

#ViaGapFix
12+3V3 @ (25.95, 63.0)-0.375mmScrape the F.Cu
13+3V3 @ (32.95, 63.0)-0.375mmScrape the F.Cu

FIX 14, 16, 25 — LCD_D0/D5/D4 → GND (B.Cu, same via)

FIX 14

#SignalViaGap
14LCD_D0GND @ (134.5, 34.85)-0.450mm
16LCD_D5GND @ (134.5, 34.85)-0.350mm
25LCD_D4GND @ (134.5, 34.85)-0.050mm

Single action: scraping the B.Cu around the GND via @ (134.5, 34.85) resolves all three.

FIX 15 — SD_CS → GND (B.Cu)

FIX 15

TraceViaGapEffectFix
SD_CSGND @ (153.5, 34.85)-0.450mmSD card unreachableScrape the B.Cu around the via

FIX 17 — BTN_B → GND (B.Cu)

FIX 17

TraceViaGapEffectFix
BTN_BGND @ (143.0, 50.25)-0.275mmBTN_B stuck LOWScrape the B.Cu around the via

FIX 18 — BTN_A → GND (F.Cu)

FIX 18

TraceViaGapEffectFix
BTN_AGND @ (76.8, 67.12)-0.250mmBTN_A shorted to GNDScrape the F.Cu around the via

FIX 19 — LCD_D7 → GND (B.Cu)

FIX 19

TraceViaGapEffectFix
LCD_D7GND @ (81.5, 32.96)-0.145mmCorrupted displayScrape the B.Cu around the via

FIX 20-22, 24 — BTN_SELECT → +3V3 (F.Cu + B.Cu, 4 spots)

FIX 20 FIX 21 FIX 22 FIX 24

#LayerViaGap
20F.Cu+3V3 @ (62.05, 44.6)-0.075mm
21F.Cu+3V3 @ (67.05, 44.6)-0.075mm
22F.Cu+3V3 @ (72.05, 44.6)-0.075mm
24B.Cu+3V3 @ (72.05, 44.6)-0.075mm

Note: gap -0.075mm — this may not manifest on every fabricated board.

FIX 23 — BTN_R → GND (F.Cu)

FIX 23

TraceViaGapEffectFix
BTN_RGND @ (123.5, 64.5)-0.075mmBTN_R stuck LOWScrape the F.Cu around the via

FIX 26 — LCD_D6 → +3V3 (F.Cu)

FIX 26

TraceViaGapEffectFix
LCD_D6+3V3 @ (88.75, 21.01)-0.040mmCorrupted displayScrape the F.Cu around the via

FIX 27 — LCD_D4 → VBUS (B.Cu)

FIX 27

TraceViaGapEffectFix
LCD_D4VBUS @ (110.95, 33.0)-0.000mmLCD_D4 borderlineScrape the B.Cu around the via (preventive)

Post-Rework Checklist

After all the fixes, verify with a multimeter in continuity mode:

TestPad 1Pad 2ExpectedAfter FIX
VBUS-GNDC17+C17->1MΩFIX 1, 3
+5V-GNDC1+C1->1MΩFIX 2, 3
+3V3-GNDC2+C2->1MΩFIX 4-8
BAT+-GNDC18+C18->1MΩFIX 3
C2 existed on v2.9 only

The +3V3 bulk capacitor on this board was C2, the 22 µF tantalum on the AMS1117 output. Both parts are gone from the current design — the SY8089 buck's ceramic C30 replaced C2. On a current board, probe C30 instead.


Assessment

This v2.9 board carries 44 routing violations, of which 27 are real short circuits. The current PCB (post-v2.9) resolved all of them in the Python generator — DFM was 114/114 pass with 0 collisions at the time, and the suite has since grown to 124 tests.

For v2.9 boards already fabricated, fixes 1-3 are essential. Fixes 4-8 restore the power rails. Fixes 9-27 are required for full functionality (display, buttons, SD card).