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Plan D: ESP32-S3 with 32 MB flash (WROOM-2 N32R16V)

The smallest possible step: keep the ESP32-S3 and everything built around it, and swap only the module, from today's ESP32-S3-WROOM-1-N16R8 (16 MB flash, 8 MB PSRAM) to the ESP32-S3-WROOM-2-N32R16V (32 MB octal flash, 16 MB octal PSRAM). Same chip, same firmware, same display, same enclosure: twice the flash and twice the PSRAM.

Facts marked with a source were checked on 2026-09-28; costs and times are estimates, and the speed effects are to be measured on a development board.

In short​

  • It solves memory, not speed. The CPU is the same dual-core LX7 at 240 MHz, so every frame rate measured today stays where it is. What changes is where ROMs live: the flash is full today (firmware image 15.86 of 16 MB) and PSRAM is the limit for Neo Geo, CPS1 and CPS2.
  • Drop-in footprint. The WROOM-2 has the same 41 pads as the WROOM-1; only pads 28–30 (IO35–37) become NC, and on our board those three pads are already unconnected (checked on U1 in the .kicad_pcb). GPIO33–37 are already taken by the octal PSRAM on today's module.
  • Only one variant is still made. N16R8V and N32R8V are end-of-life; N32R16V is the one to design with (datasheet).
  • Octal flash is faster. Game data kept in the flash partition (Neo Geo program, CPS1 tiles, sample ROMs) is read over 8 lines instead of 4.
  • It reaches none of the v4 requirements that need a new chip: no PS1, no N64, no HDMI, no Bluetooth Classic. It is a v3.2, not a v4.

The module, all the variants​

ModuleFlashPSRAMFlash / PSRAM voltageStatusPrice (JLC/LCSC)
ESP32-S3-WROOM-1-N16R8 (today, U1)16 MB quad8 MB octal3.3 Vactive~$3.50 (C2913202)
ESP32-S3-WROOM-2-N16R8V16 MB octal8 MB octal1.8 VEOL—
ESP32-S3-WROOM-2-N32R8V32 MB octal8 MB octal1.8 VEOL—
ESP32-S3-WROOM-2-N32R16V32 MB octal16 MB octal1.8 Vactive~$8.30 (LCSC C42417293, out of stock at LCSC on 2026-09-28; JLC assembly listing C9900162944)

Stock is the first thing to check: a design on a module that JLC cannot place is not a design.

What the module change touches on the board​

PointToday (WROOM-1 N16R8)WROOM-2 N32R16VAction
Footprint41 pads, 18 × 25.5 mmsame pads and sizenone: pads 28–30 are NC on the WROOM-2 and unconnected on our PCB
GPIO33–37used by the octal PSRAMused by octal flash + PSRAMnone: already reserved (board_config.h)
Flash voltage3.3 V1.8 V, set inside the module by eFuse (VDD_SPI_FORCE)none on the carrier: nothing of ours sits on VDD_SPI
GPIO45 (BTN_L)VDD_SPI strap pin, sampled at bootignored, because the eFuse fixes VDD_SPInone; the eFuse even removes a boot-time dependency on the button
Ambient temperatureup to 85 °Cup to 65 °C (85 °C with PSRAM ECC, which costs 1/16 of the PSRAM: 15 MB usable)measure the module temperature inside the closed enclosure while charging and playing
Firmwaresdkconfig: quad flash, octal PSRAMoctal flash (OPI), 32 MB, octal PSRAM 16 MBnew retro-go target variant; partition table for 32 MB

Every case, system by system​

Speed is the same as on today's board. Only the memory column changes.

CaseToday (N16R8)With N32R16VVerdict
Adding apps (new cores, ports)flash full (15.86 / 16 MB): a new app needs another removed, or the SD "bootstrap" flasher~16 MB more flash: all current apps + room for several more, no bootstrap needed🟢 solved
8-bit / 16-bit consoles (NES … Genesis, SNES)full speed; ROMs in 8 MB PSRAMunchanged (the CPU is the limit, not memory)⚪ no change
SNES special chips (SuperFX, SA-1, DSP-1)Star Fox uses the whole 6 MB ROM bufferroom for larger ROM buffers; speed unchanged⚪ small gain
Classic MAME (Z80 / 6502 / 8080)60 fpsunchanged⚪ no change
68000 arcade (Blood Bros., Aero Fighters)tile cache + 4 MB mamerom partitiongraphics fully decoded in PSRAM (no tile cache misses)🟢 small speed gain
Capcom CPS1graphics streamed from the zip to flash + PSRAM (SF2 fits)the whole set in flash + PSRAM, simpler loading🟢 easier
Neo Geo (up to ~50 MB)sprites and big sample ROMs paged from the SD, caches of 0.9–2.3 MBlarger mamerom partition (samples + program in flash, no sample paging) and a sprite cache of ~8–10 MB: far fewer SD reads🟢 better; still paged
Neo Geo (over ~50 MB, KOF '98 class)nosprites still on the SD; possible if the CPU keeps up🟡 memory ok, speed limit
CPS2 (19XX, SSF2, SF Alpha, ~20–25 MB)not ported; 8 MB PSRAM too small without heavy pagingdecrypted program (both copies) + QSound samples in flash, graphics in flash + PSRAM cache🟡 memory ok, the CPU decides
Sega CDnomemory fine (the CD streams from SD), but a second 68000 at 12.5 MHz on top of a Genesis core already at BUSY 94%🔴 CPU
GBA, 32Xnono: ARM7 / two SH-2 without a dynarec for Xtensa🔴 CPU
PlayStation, N64nono🔴
HDMInono: the S3 has no DSI or HDMI🔴
Bluetooth controllersBLE onlyBLE only (same chip)🟡 unchanged
Wi-Fiyesyes🟢

The one catch: a 32 MB address window​

The ESP32-S3 sees external memory through a 32 MB virtual window that flash and PSRAM share: "the 32 MB virtual addresses are shared with flash instructions and rodata" (ESP-IDF, external RAM).

Mapped at the same timeTodayN32R16V
PSRAM8 MB16 MB
Running app (code + rodata)~2–3 MB~2–3 MB
mamerom game data, memory-mapped4 MBup to ~12 MB
Total, of 32 MB~15 MB~31 MB

So the 32 MB of flash cannot all be mapped at once. That is fine for how the emulators work (one game at a time, mapped when it starts, as mame-go already does), but the budget above is the ceiling: a 12 MB game-data window next to 16 MB of PSRAM. First thing to confirm on the development board.

Speed: what could still improve​

  • Octal flash. Data read straight from the flash partition (Neo Geo program, CPS1 tiles, samples) moves over 8 data lines instead of 4. The flash and the PSRAM share the same memory bus on the S3, so the real gain is to be measured, not assumed.
  • Fewer cache misses. More PSRAM means larger sprite and tile caches: less SD traffic on scene changes in Neo Geo, no tile cache at all on the 68000 boards.
  • No change for anything CPU-bound: SNES drawn frames, Neo Geo in play (39 emulated fps on Metal Slug 2), DOOM, Quake.

What changes on the console​

AreaChange
ModuleU1 → ESP32-S3-WROOM-2-N32R16V (same footprint)
PCBnone expected; regenerate BOM/CPL, re-run the full gate suite and /pcba-readiness
Firmwareretro-go target variant: octal flash, 32 MB partition table (larger app partitions + a larger mamerom), 16 MB PSRAM
Launchera "Nintendo 64" section with the native ports (Super Mario 64, later Mario Kart 64): their apps (about 1.5 MB each, assets on the card) get partitions in the 32 MB table. Decided on 2026-10-05: they wait for this module, nothing is removed from the 16 MB layout for them
Display, audio, power, enclosureunchanged

Study plan with gates​

GateMeasureContinue if
1Stock: JLC assembly availability of N32R16Vplaceable in quantity
2Retro-go on an N32R16V dev board (e.g. an ESP32-S3 board with that module): boot, octal flash + 16 MB PSRAM, full image flashedevery app boots, emu_check.py numbers equal to today's
332 MB window: 16 MB PSRAM + a 12 MB mamerom mapping at the same timemaps without errors
4Neo Geo (Metal Slug 2) and CPS1 (SF2) with everything in flash + PSRAMsame or better fps, no SD paging for samples
5Module temperature in the closed enclosure, charging and playingbelow 65 °C with margin, or enable PSRAM ECC

Time and cost​

ItemEstimate
Gates 1–5 on a development board1–2 weeks
BOM change + full gate suite + JLC order1 week
Firmware target variant + partition tablea few days
Total~3–4 weeks
BOM delta per console~+$5 (module ~$8.30 instead of ~$3.50)
Development board~$15–30
Battery lifelike today

When it makes sense​

If the goal is more games on the current console (more apps, Neo Geo and CPS1 with less paging, a chance at CPS2) and PS1, N64, HDMI and Bluetooth Classic can wait. It is the cheapest and fastest plan by far and throws nothing away, but it does not replace a v4: it is a v3.2 on the same road as Remediation, and a Linux board (Plans B or C) is still needed for the v4 requirements.

Sources​

Checked on 2026-09-28.